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realtime: Set tsc as 'reliable'

We already disable the clocksource watchdog, it's there to double-check
whether clock results are coherent between reads. But a new reliability
test was introduced in recent kernels[1], tracking tsc drift between
CPUs[2]. It works by programming timers on all CPUs, including isolated
ones, and checks whether the tsc was adjusted in between runs. This
introduces unwarranted latency on real time systems. So let's promote
tsc to 'reliable', which disables both checks.

There shouldn't be any impact on old nor new setups. First, this test
didn't exist in the past, so any eventual drift was left uncorrected.
Second, most telco and HPC use-cases will make heavy use of tsc in
user-space, and its reliability is already assumed in the system's
design.

[1] c7719e793478 x86/tsc: Add a timer to make sure TSC_adjust is always
		 checked
[2] Generally caused by rogue BIOSes adjusting the tsc on a CPU and not
    doing so on the rest

Signed-off-by: Nicolas Saenz Julienne <nsaenzju@redhat.com>
This commit is contained in:
Nicolas Saenz Julienne 2022-03-16 17:06:45 +01:00
parent e1045f2d1d
commit 49cc817871

View file

@ -52,7 +52,7 @@ kernel.timer_migration = 0
/sys/devices/system/machinecheck/machinecheck*/ignore_ce = 1
[bootloader]
cmdline_realtime=+isolcpus=${managed_irq}${isolated_cores} intel_pstate=disable nosoftlockup tsc=nowatchdog
cmdline_realtime=+isolcpus=${managed_irq}${isolated_cores} intel_pstate=disable nosoftlockup tsc=reliable
[irqbalance]
banned_cpus=${isolated_cores}