714 lines
25 KiB
C
714 lines
25 KiB
C
/*
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* CAN module object for Microchip dsPIC33F or PIC24H microcontroller.
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*
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* @file CO_driver.c
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* @author Janez Paternoster
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* @copyright 2004 - 2013 Janez Paternoster
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*
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* This file is part of CANopenNode, an opensource CANopen Stack.
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* Project home page is <http://canopennode.sourceforge.net>.
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* For more information on CANopen see <http://www.can-cia.org/>.
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*
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* CANopenNode is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 2.1 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "CO_driver.h"
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#include "CO_Emergency.h"
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extern const CO_CANbitRateData_t CO_CANbitRateData[8];
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/**
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* Macro and Constants - CAN module registers and DMA registers - offset.
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*/
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#define CAN_REG(base, offset) (*((volatile uint16_t *) (base + offset)))
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#define C_CTRL1 0x00
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#define C_CTRL2 0x02
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#define C_VEC 0x04
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#define C_FCTRL 0x06
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#define C_FIFO 0x08
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#define C_INTF 0x0A
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#define C_INTE 0x0C
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#define C_EC 0x0E
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#define C_CFG1 0x10
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#define C_CFG2 0x12
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#define C_FEN1 0x14
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#define C_FMSKSEL1 0x18
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#define C_FMSKSEL2 0x1A
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/* WIN == 0 */
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#define C_RXFUL1 0x20
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#define C_RXFUL2 0x22
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#define C_RXOVF1 0x28
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#define C_RXOVF2 0x2A
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#define C_TR01CON 0x30
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#define C_TR23CON 0x32
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#define C_TR45CON 0x34
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#define C_TR67CON 0x36
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#define C_RXD 0x40
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#define C_TXD 0x42
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/* WIN == 1 */
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#define C_BUFPNT1 0x20
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#define C_BUFPNT2 0x22
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#define C_BUFPNT3 0x24
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#define C_BUFPNT4 0x26
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#define C_RXM0SID 0x30
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#define C_RXM1SID 0x34
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#define C_RXM2SID 0x38
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#define C_RXF0SID 0x40 /* filter1 = +4, ...., filter 15 = +4*15 */
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#define DMA_REG(base, offset) (*((volatile uint16_t *) (base + offset)))
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#define DMA_CON 0x0
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#define DMA_REQ 0x2
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#ifndef __HAS_EDS__
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#define DMA_STA 0x4
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#define DMA_STB 0x6
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#define DMA_PAD 0x8
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#define DMA_CNT 0xA
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#else
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#define DMA_STAL 0x4
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#define DMA_STAH 0x6
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#define DMA_STBL 0x8
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#define DMA_STBH 0xA
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#define DMA_PAD 0xC
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#define DMA_CNT 0xE
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#endif
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/******************************************************************************/
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void CO_CANsetConfigurationMode(uint16_t CANbaseAddress){
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uint16_t C_CTRL1copy = CAN_REG(CANbaseAddress, C_CTRL1);
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/* set REQOP = 0x4 */
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C_CTRL1copy &= 0xFCFF;
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C_CTRL1copy |= 0x0400;
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CAN_REG(CANbaseAddress, C_CTRL1) = C_CTRL1copy;
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/* while OPMODE != 4 */
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while((CAN_REG(CANbaseAddress, C_CTRL1) & 0x00E0) != 0x0080);
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}
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/******************************************************************************/
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void CO_CANsetNormalMode(uint16_t CANbaseAddress){
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uint16_t C_CTRL1copy = CAN_REG(CANbaseAddress, C_CTRL1);
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/* set REQOP = 0x0 */
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C_CTRL1copy &= 0xF8FF;
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CAN_REG(CANbaseAddress, C_CTRL1) = C_CTRL1copy;
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/* while OPMODE != 0 */
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while((CAN_REG(CANbaseAddress, C_CTRL1) & 0x00E0) != 0x0000);
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}
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/******************************************************************************/
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CO_ReturnError_t CO_CANmodule_init(
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CO_CANmodule_t *CANmodule,
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uint16_t CANbaseAddress,
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uint16_t DMArxBaseAddress,
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uint16_t DMAtxBaseAddress,
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EDS_PTR CO_CANrxMsg_t *CANmsgBuff,
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uint8_t CANmsgBuffSize,
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uint16_t CANmsgBuffDMAoffset,
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#if defined(__HAS_EDS__)
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uint16_t CANmsgBuffDMApage,
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#endif
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CO_CANrx_t rxArray[],
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uint16_t rxSize,
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CO_CANtx_t txArray[],
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uint16_t txSize,
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uint16_t CANbitRate)
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{
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uint16_t i;
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volatile uint16_t *pRXF;
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/* Configure object variables */
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CANmodule->CANbaseAddress = CANbaseAddress;
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CANmodule->CANmsgBuff = CANmsgBuff;
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CANmodule->CANmsgBuffSize = CANmsgBuffSize;
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CANmodule->rxArray = rxArray;
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CANmodule->rxSize = rxSize;
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CANmodule->txArray = txArray;
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CANmodule->txSize = txSize;
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CANmodule->useCANrxFilters = (rxSize <= 16U) ? true : false;
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CANmodule->bufferInhibitFlag = false;
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CANmodule->firstCANtxMessage = true;
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CANmodule->CANtxCount = 0U;
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CANmodule->errOld = 0U;
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CANmodule->em = NULL;
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for(i=0U; i<rxSize; i++){
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rxArray[i].ident = 0U;
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rxArray[i].pFunct = NULL;
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}
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for(i=0U; i<txSize; i++){
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txArray[i].bufferFull = false;
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}
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/* Configure control registers */
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CAN_REG(CANbaseAddress, C_CTRL1) = 0x0400;
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CAN_REG(CANbaseAddress, C_CTRL2) = 0x0000;
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/* Configure CAN timing */
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switch(CANbitRate){
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case 10: i=0; break;
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case 20: i=1; break;
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case 50: i=2; break;
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default:
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case 125: i=3; break;
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case 250: i=4; break;
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case 500: i=5; break;
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case 800: i=6; break;
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case 1000: i=7; break;
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}
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if(CO_CANbitRateData[i].scale == 1)
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CAN_REG(CANbaseAddress, C_CTRL1) |= 0x0800;
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CAN_REG(CANbaseAddress, C_CFG1) = (CO_CANbitRateData[i].SJW - 1) << 6 |
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(CO_CANbitRateData[i].BRP - 1);
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CAN_REG(CANbaseAddress, C_CFG2) = ((uint16_t)(CO_CANbitRateData[i].phSeg2 - 1)) << 8 |
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0x0080 |
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(CO_CANbitRateData[i].phSeg1 - 1) << 3 |
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(CO_CANbitRateData[i].PROP - 1);
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/* setup RX and TX control registers */
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CAN_REG(CANbaseAddress, C_CTRL1) &= 0xFFFE; /* WIN = 0 - use buffer registers */
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CAN_REG(CANbaseAddress, C_RXFUL1) = 0x0000;
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CAN_REG(CANbaseAddress, C_RXFUL2) = 0x0000;
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CAN_REG(CANbaseAddress, C_RXOVF1) = 0x0000;
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CAN_REG(CANbaseAddress, C_RXOVF2) = 0x0000;
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CAN_REG(CANbaseAddress, C_TR01CON) = 0x0080; /* use one buffer for transmission */
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CAN_REG(CANbaseAddress, C_TR23CON) = 0x0000;
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CAN_REG(CANbaseAddress, C_TR45CON) = 0x0000;
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CAN_REG(CANbaseAddress, C_TR67CON) = 0x0000;
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/* CAN module hardware filters */
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CAN_REG(CANbaseAddress, C_CTRL1) |= 0x0001; /* WIN = 1 - use filter registers */
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CAN_REG(CANbaseAddress, C_FEN1) = 0xFFFF; /* enable all 16 filters */
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CAN_REG(CANbaseAddress, C_FMSKSEL1) = 0x0000; /* all filters are using mask 0 */
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CAN_REG(CANbaseAddress, C_FMSKSEL2) = 0x0000;
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CAN_REG(CANbaseAddress, C_BUFPNT1) = 0xFFFF; /* use FIFO for all filters */
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CAN_REG(CANbaseAddress, C_BUFPNT2) = 0xFFFF;
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CAN_REG(CANbaseAddress, C_BUFPNT3) = 0xFFFF;
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CAN_REG(CANbaseAddress, C_BUFPNT4) = 0xFFFF;
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/* set all filters to 0 */
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pRXF = &CAN_REG(CANbaseAddress, C_RXF0SID);
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for(i=0; i<16; i++){
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*pRXF = 0x0000;
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pRXF += 2;
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}
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if(CANmodule->useCANrxFilters){
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/* CAN module filters are used, they will be configured with */
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/* CO_CANrxBufferInit() functions, called by separate CANopen */
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/* init functions. */
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/* All mask bits are 1, so received message must match filter */
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CAN_REG(CANbaseAddress, C_RXM0SID) = 0xFFE8;
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CAN_REG(CANbaseAddress, C_RXM1SID) = 0xFFE8;
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CAN_REG(CANbaseAddress, C_RXM2SID) = 0xFFE8;
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}
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else{
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/* CAN module filters are not used, all messages with standard 11-bit */
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/* identifier will be received */
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/* Set masks so, that all messages with standard identifier are accepted */
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CAN_REG(CANbaseAddress, C_RXM0SID) = 0x0008;
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CAN_REG(CANbaseAddress, C_RXM1SID) = 0x0008;
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CAN_REG(CANbaseAddress, C_RXM2SID) = 0x0008;
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}
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/* WIN = 0 - use buffer registers for default */
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CAN_REG(CANbaseAddress, C_CTRL1) &= 0xFFFE;
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/* Configure DMA controller */
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/* set size of buffer in DMA RAM (FIFO Area Starts with Tx/Rx buffer TRB1 - FSA = 1) */
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if (CANmsgBuffSize >= 32) CAN_REG(CANbaseAddress, C_FCTRL) = 0xC001;
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else if(CANmsgBuffSize >= 24) CAN_REG(CANbaseAddress, C_FCTRL) = 0xA001;
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else if(CANmsgBuffSize >= 16) CAN_REG(CANbaseAddress, C_FCTRL) = 0x8001;
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else if(CANmsgBuffSize >= 12) CAN_REG(CANbaseAddress, C_FCTRL) = 0x6001;
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else if(CANmsgBuffSize >= 8) CAN_REG(CANbaseAddress, C_FCTRL) = 0x4001;
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else if(CANmsgBuffSize >= 6) CAN_REG(CANbaseAddress, C_FCTRL) = 0x2001;
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else if(CANmsgBuffSize >= 4) CAN_REG(CANbaseAddress, C_FCTRL) = 0x0001;
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else return CO_ERROR_ILLEGAL_ARGUMENT;
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/* DMA chanel initialization for ECAN reception */
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DMA_REG(DMArxBaseAddress, DMA_CON) = 0x0020;
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DMA_REG(DMArxBaseAddress, DMA_PAD) = (volatile uint16_t) &CAN_REG(CANbaseAddress, C_RXD);
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DMA_REG(DMArxBaseAddress, DMA_CNT) = 7;
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DMA_REG(DMArxBaseAddress, DMA_REQ) = (CANbaseAddress==ADDR_CAN1) ? 34 : 55;
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#ifndef __HAS_EDS__
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DMA_REG(DMArxBaseAddress, DMA_STA) = CANmsgBuffDMAoffset;
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#else
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DMA_REG(DMArxBaseAddress, DMA_STAL) = CANmsgBuffDMAoffset;
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DMA_REG(DMArxBaseAddress, DMA_STAH) = CANmsgBuffDMApage;
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#endif
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DMA_REG(DMArxBaseAddress, DMA_CON) = 0x8020;
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/* DMA chanel initialization for ECAN transmission */
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DMA_REG(DMAtxBaseAddress, DMA_CON) = 0x2020;
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DMA_REG(DMAtxBaseAddress, DMA_PAD) = (volatile uint16_t) &CAN_REG(CANbaseAddress, C_TXD);
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DMA_REG(DMAtxBaseAddress, DMA_CNT) = 7;
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DMA_REG(DMAtxBaseAddress, DMA_REQ) = (CANbaseAddress==ADDR_CAN1) ? 70 : 71;
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#ifndef __HAS_EDS__
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DMA_REG(DMAtxBaseAddress, DMA_STA) = CANmsgBuffDMAoffset;
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#else
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DMA_REG(DMAtxBaseAddress, DMA_STAL) = CANmsgBuffDMAoffset;
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DMA_REG(DMAtxBaseAddress, DMA_STAH) = CANmsgBuffDMApage;
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#endif
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DMA_REG(DMAtxBaseAddress, DMA_CON) = 0xA020;
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/* CAN interrupt registers */
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/* clear interrupt flags */
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CAN_REG(CANbaseAddress, C_INTF) = 0x0000;
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/* enable receive and transmit interrupt */
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CAN_REG(CANbaseAddress, C_INTE) = 0x0003;
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/* CAN interrupt (combined) must be configured by application */
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return CO_ERROR_NO;
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}
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/******************************************************************************/
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void CO_CANmodule_disable(CO_CANmodule_t *CANmodule){
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CO_CANsetConfigurationMode(CANmodule->CANbaseAddress);
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}
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/******************************************************************************/
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uint16_t CO_CANrxMsg_readIdent(const CO_CANrxMsg_t *rxMsg){
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return (rxMsg->ident >> 2) & 0x7FF;
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}
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/******************************************************************************/
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CO_ReturnError_t CO_CANrxBufferInit(
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CO_CANmodule_t *CANmodule,
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uint16_t index,
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uint16_t ident,
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uint16_t mask,
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bool_t rtr,
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void *object,
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void (*pFunct)(void *object, const CO_CANrxMsg_t *message))
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{
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CO_ReturnError_t ret = CO_ERROR_NO;
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if((CANmodule!=NULL) && (object!=NULL) && (pFunct!=NULL) && (index < CANmodule->rxSize)){
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/* buffer, which will be configured */
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CO_CANrx_t *buffer = &CANmodule->rxArray[index];
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uint16_t RXF, RXM;
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uint16_t addr = CANmodule->CANbaseAddress;
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/* Configure object variables */
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buffer->object = object;
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buffer->pFunct = pFunct;
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/* CAN identifier and CAN mask, bit aligned with CAN module registers (in DMA RAM) */
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RXF = (ident & 0x07FF) << 2;
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if(rtr){
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RXF |= 0x02;
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}
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RXM = (mask & 0x07FF) << 2;
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RXM |= 0x02;
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/* configure filter and mask */
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if(RXF != buffer->ident || RXM != buffer->mask){
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volatile uint16_t C_CTRL1old = CAN_REG(addr, C_CTRL1);
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CAN_REG(addr, C_CTRL1) = C_CTRL1old | 0x0001; /* WIN = 1 - use filter registers */
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buffer->ident = RXF;
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buffer->mask = RXM;
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/* Set CAN hardware module filter and mask. */
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if(CANmodule->useCANrxFilters){
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volatile uint16_t *pRXF;
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volatile uint16_t *pRXM0, *pRXM1, *pRXM2;
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uint16_t selectMask;
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/* align RXF and RXM with C_RXF_SID and C_RXM_SID registers */
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RXF &= 0xFFFD; RXF <<= 3;
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RXM &= 0xFFFD; RXM <<= 3; RXM |= 0x0008;
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/* write to filter */
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pRXF = &CAN_REG(addr, C_RXF0SID); /* pointer to first filter register */
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pRXF += index * 2; /* now points to C_RXFiSID (i == index) */
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*pRXF = RXF; /* write value to filter */
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/* configure mask (There are three masks, each of them can be asigned to any filter. */
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/* First mask has always the value 0xFFE8 - all 11 bits must match). */
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pRXM0 = &CAN_REG(addr, C_RXM0SID);
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pRXM1 = &CAN_REG(addr, C_RXM1SID);
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pRXM2 = &CAN_REG(addr, C_RXM2SID);
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if(RXM == 0xFFE8){
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selectMask = 0;
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}
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else if(RXM == *pRXM1 || *pRXM1 == 0xFFE8){
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/* RXM is equal to mask 1 or mask 1 was not yet configured. */
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*pRXM1 = RXM;
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selectMask = 1;
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}
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else if(RXM == *pRXM2 || *pRXM2 == 0xFFE8){
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/* RXM is equal to mask 2 or mask 2 was not yet configured. */
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*pRXM2 = RXM;
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selectMask = 2;
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}
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else{
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/* not enough masks */
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ret = CO_ERROR_OUT_OF_MEMORY;
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selectMask = 0;
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}
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if(ret == CO_ERROR_NO){
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/* now write to appropriate mask select register */
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if(index<8){
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uint16_t clearMask = ~(0x0003 << (index << 1));
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selectMask = selectMask << (index << 1);
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CAN_REG(addr, C_FMSKSEL1) =
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(CAN_REG(addr, C_FMSKSEL1) & clearMask) | selectMask;
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}
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else{
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uint16_t clearMask = ~(0x0003 << ((index-8) << 1));
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selectMask = selectMask << ((index-8) << 1);
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CAN_REG(addr, C_FMSKSEL2) =
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(CAN_REG(addr, C_FMSKSEL2) & clearMask) | selectMask;
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}
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}
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}
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CAN_REG(addr, C_CTRL1) = C_CTRL1old;
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}
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}
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else{
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ret = CO_ERROR_ILLEGAL_ARGUMENT;
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}
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return ret;
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}
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/******************************************************************************/
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CO_CANtx_t *CO_CANtxBufferInit(
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CO_CANmodule_t *CANmodule,
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uint16_t index,
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uint16_t ident,
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bool_t rtr,
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uint8_t noOfBytes,
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bool_t syncFlag)
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{
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CO_CANtx_t *buffer = NULL;
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if((CANmodule != NULL) && (index < CANmodule->txSize)){
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/* get specific buffer */
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buffer = &CANmodule->txArray[index];
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/* CAN identifier, bit aligned with CAN module registers */
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uint16_t TXF;
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TXF = (ident & 0x07FF) << 2;
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if(rtr){
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TXF |= 0x02;
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}
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/* write to buffer */
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buffer->ident = TXF;
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buffer->DLC = noOfBytes;
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buffer->bufferFull = false;
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buffer->syncFlag = syncFlag;
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}
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return buffer;
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}
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/* Copy message to CAN module - internal usage only.
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*
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* @param CANbaseAddress CAN module base address
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* @param dest Pointer to CAN module transmit buffer
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* @param src Pointer to source message
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*/
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static void CO_CANsendToModule(uint16_t CANbaseAddress, EDS_PTR CO_CANrxMsg_t *dest, CO_CANtx_t *src){
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uint8_t DLC;
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EDS_PTR uint8_t *CANdataBuffer;
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uint8_t *pData;
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volatile uint16_t C_CTRL1old;
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/* CAN-ID + RTR */
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dest->ident = src->ident;
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/* Data lenght */
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DLC = src->DLC;
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if(DLC > 8) DLC = 8;
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dest->DLC = DLC;
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/* copy data */
|
|
CANdataBuffer = &(dest->data[0]);
|
|
pData = src->data;
|
|
for(; DLC>0; DLC--) *(CANdataBuffer++) = *(pData++);
|
|
|
|
/* control register, transmit request */
|
|
C_CTRL1old = CAN_REG(CANbaseAddress, C_CTRL1);
|
|
CAN_REG(CANbaseAddress, C_CTRL1) = C_CTRL1old & 0xFFFE; /* WIN = 0 - use buffer registers */
|
|
CAN_REG(CANbaseAddress, C_TR01CON) |= 0x08;
|
|
CAN_REG(CANbaseAddress, C_CTRL1) = C_CTRL1old;
|
|
}
|
|
|
|
|
|
/******************************************************************************/
|
|
CO_ReturnError_t CO_CANsend(CO_CANmodule_t *CANmodule, CO_CANtx_t *buffer){
|
|
CO_ReturnError_t err = CO_ERROR_NO;
|
|
uint16_t addr = CANmodule->CANbaseAddress;
|
|
volatile uint16_t C_CTRL1old, C_TR01CONcopy;
|
|
|
|
/* Verify overflow */
|
|
if(buffer->bufferFull){
|
|
if(!CANmodule->firstCANtxMessage){
|
|
/* don't set error, if bootup message is still on buffers */
|
|
CO_errorReport((CO_EM_t*)CANmodule->em, CO_EM_CAN_TX_OVERFLOW, CO_EMC_CAN_OVERRUN, (buffer->ident >> 2) & 0x7FF);
|
|
}
|
|
err = CO_ERROR_TX_OVERFLOW;
|
|
}
|
|
|
|
CO_DISABLE_INTERRUPTS();
|
|
/* read C_TR01CON */
|
|
C_CTRL1old = CAN_REG(addr, C_CTRL1);
|
|
CAN_REG(addr, C_CTRL1) = C_CTRL1old & 0xFFFE; /* WIN = 0 - use buffer registers */
|
|
C_TR01CONcopy = CAN_REG(addr, C_TR01CON);
|
|
CAN_REG(addr, C_CTRL1) = C_CTRL1old;
|
|
|
|
/* if CAN TX buffer is free, copy message to it */
|
|
if((C_TR01CONcopy & 0x8) == 0 && CANmodule->CANtxCount == 0){
|
|
CANmodule->bufferInhibitFlag = buffer->syncFlag;
|
|
CO_CANsendToModule(addr, CANmodule->CANmsgBuff, buffer);
|
|
}
|
|
/* if no buffer is free, message will be sent by interrupt */
|
|
else{
|
|
buffer->bufferFull = true;
|
|
CANmodule->CANtxCount++;
|
|
}
|
|
CO_ENABLE_INTERRUPTS();
|
|
|
|
return err;
|
|
}
|
|
|
|
|
|
/******************************************************************************/
|
|
void CO_CANclearPendingSyncPDOs(CO_CANmodule_t *CANmodule){
|
|
uint32_t tpdoDeleted = 0U;
|
|
|
|
CO_DISABLE_INTERRUPTS();
|
|
/* Abort message from CAN module, if there is synchronous TPDO.
|
|
* Take special care with this functionality. */
|
|
if(CANmodule->bufferInhibitFlag){
|
|
volatile uint16_t C_CTRL1old = CAN_REG(CANmodule->CANbaseAddress, C_CTRL1);
|
|
CAN_REG(CANmodule->CANbaseAddress, C_CTRL1) = C_CTRL1old & 0xFFFE; /* WIN = 0 - use buffer registers */
|
|
CAN_REG(CANmodule->CANbaseAddress, C_TR01CON) &= 0xFFF7; /* clear TXREQ */
|
|
CAN_REG(CANmodule->CANbaseAddress, C_CTRL1) = C_CTRL1old;
|
|
CANmodule->bufferInhibitFlag = false;
|
|
tpdoDeleted = 1U;
|
|
}
|
|
/* delete also pending synchronous TPDOs in TX buffers */
|
|
if(CANmodule->CANtxCount != 0U){
|
|
uint16_t i;
|
|
CO_CANtx_t *buffer = &CANmodule->txArray[0];
|
|
for(i = CANmodule->txSize; i > 0U; i--){
|
|
if(buffer->bufferFull){
|
|
if(buffer->syncFlag){
|
|
buffer->bufferFull = false;
|
|
CANmodule->CANtxCount--;
|
|
tpdoDeleted = 2U;
|
|
}
|
|
}
|
|
buffer++;
|
|
}
|
|
}
|
|
CO_ENABLE_INTERRUPTS();
|
|
|
|
|
|
if(tpdoDeleted != 0U){
|
|
CO_errorReport((CO_EM_t*)CANmodule->em, CO_EM_TPDO_OUTSIDE_WINDOW, CO_EMC_COMMUNICATION, tpdoDeleted);
|
|
}
|
|
}
|
|
|
|
|
|
/******************************************************************************/
|
|
void CO_CANverifyErrors(CO_CANmodule_t *CANmodule){
|
|
uint8_t err;
|
|
CO_EM_t* em = (CO_EM_t*)CANmodule->em;
|
|
|
|
err = CAN_REG(CANmodule->CANbaseAddress, C_INTF) >> 8;
|
|
if(CAN_REG(CANmodule->CANbaseAddress, C_INTF) & 4){
|
|
err |= 0x80;
|
|
}
|
|
|
|
if(CANmodule->errOld != err){
|
|
CANmodule->errOld = err;
|
|
|
|
/* CAN RX bus overflow */
|
|
if(err & 0xC0){
|
|
CO_errorReport(em, CO_EM_CAN_RXB_OVERFLOW, CO_EMC_CAN_OVERRUN, err);
|
|
CAN_REG(CANmodule->CANbaseAddress, C_INTF) &= 0xFFFB;/* clear bits */
|
|
}
|
|
|
|
/* CAN TX bus off */
|
|
if(err & 0x20){
|
|
CO_errorReport(em, CO_EM_CAN_TX_BUS_OFF, CO_EMC_BUS_OFF_RECOVERED, err);
|
|
}
|
|
else{
|
|
CO_errorReset(em, CO_EM_CAN_TX_BUS_OFF, err);
|
|
}
|
|
|
|
/* CAN TX bus passive */
|
|
if(err & 0x10){
|
|
if(!CANmodule->firstCANtxMessage) CO_errorReport(em, CO_EM_CAN_TX_BUS_PASSIVE, CO_EMC_CAN_PASSIVE, err);
|
|
}
|
|
else{
|
|
int8_t isError = CO_isError(em, CO_EM_CAN_TX_BUS_PASSIVE);
|
|
if(isError){
|
|
CO_errorReset(em, CO_EM_CAN_TX_BUS_PASSIVE, err);
|
|
CO_errorReset(em, CO_EM_CAN_TX_OVERFLOW, err);
|
|
}
|
|
}
|
|
|
|
/* CAN RX bus passive */
|
|
if(err & 0x08){
|
|
CO_errorReport(em, CO_EM_CAN_RX_BUS_PASSIVE, CO_EMC_CAN_PASSIVE, err);
|
|
}
|
|
else{
|
|
CO_errorReset(em, CO_EM_CAN_RX_BUS_PASSIVE, err);
|
|
}
|
|
|
|
/* CAN TX or RX bus warning */
|
|
if(err & 0x19){
|
|
CO_errorReport(em, CO_EM_CAN_BUS_WARNING, CO_EMC_NO_ERROR, err);
|
|
}
|
|
else{
|
|
CO_errorReset(em, CO_EM_CAN_BUS_WARNING, err);
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/******************************************************************************/
|
|
void CO_CANinterrupt(CO_CANmodule_t *CANmodule){
|
|
uint16_t ICODE;
|
|
ICODE = CAN_REG(CANmodule->CANbaseAddress, C_VEC) & 0x1F;
|
|
|
|
/* receive interrupt (New CAN messagge is available in RX FIFO buffer) */
|
|
if(ICODE > 0){
|
|
EDS_PTR CO_CANrxMsg_t *rcvMsg;/* pointer to received message in CAN module */
|
|
uint16_t index; /* index of received message */
|
|
uint16_t rcvMsgIdent; /* identifier of the received message */
|
|
CO_CANrx_t *buffer = NULL; /* receive message buffer from CO_CANmodule_t object. */
|
|
bool_t msgMatched = false;
|
|
volatile uint16_t C_CTRL1old;
|
|
|
|
rcvMsg = &CANmodule->CANmsgBuff[ICODE];
|
|
rcvMsgIdent = rcvMsg->ident;
|
|
if(CANmodule->useCANrxFilters){
|
|
/* CAN module filters are used. Message with known 11-bit identifier has */
|
|
/* been received */
|
|
index = rcvMsg->FILHIT;
|
|
if(index < CANmodule->rxSize){
|
|
buffer = &CANmodule->rxArray[index];
|
|
/* verify also RTR */
|
|
if(((rcvMsgIdent ^ buffer->ident) & buffer->mask) == 0U){
|
|
msgMatched = true;
|
|
}
|
|
}
|
|
}
|
|
else{
|
|
/* CAN module filters are not used, message with any standard 11-bit identifier */
|
|
/* has been received. Search rxArray form CANmodule for the same CAN-ID. */
|
|
buffer = &CANmodule->rxArray[0];
|
|
for(index = CANmodule->rxSize; index > 0U; index--){
|
|
if(((rcvMsgIdent ^ buffer->ident) & buffer->mask) == 0U){
|
|
msgMatched = true;
|
|
break;
|
|
}
|
|
buffer++;
|
|
}
|
|
}
|
|
|
|
/* Call specific function, which will process the message */
|
|
if(msgMatched && (buffer != NULL) && (buffer->pFunct != NULL)){
|
|
#ifdef __HAS_EDS__
|
|
CO_CANrxMsg_t _rcvMsg = *rcvMsg;
|
|
buffer->pFunct(buffer->object, &_rcvMsg);
|
|
#else
|
|
buffer->pFunct(buffer->object, rcvMsg);
|
|
#endif
|
|
}
|
|
|
|
/* Clear RXFUL flag */
|
|
CO_DISABLE_INTERRUPTS();
|
|
C_CTRL1old = CAN_REG(CANmodule->CANbaseAddress, C_CTRL1);
|
|
CAN_REG(CANmodule->CANbaseAddress, C_CTRL1) = C_CTRL1old & 0xFFFE; /* WIN = 0 - use buffer registers */
|
|
if(ICODE < 16) CAN_REG(CANmodule->CANbaseAddress, C_RXFUL1) ^= 1 << ICODE;
|
|
else CAN_REG(CANmodule->CANbaseAddress, C_RXFUL2) ^= 1 << (ICODE & 0xF);
|
|
CAN_REG(CANmodule->CANbaseAddress, C_CTRL1) = C_CTRL1old;
|
|
CO_ENABLE_INTERRUPTS();
|
|
|
|
/* Clear interrupt flag */
|
|
CAN_REG(CANmodule->CANbaseAddress, C_INTF) &= 0xFFFD;
|
|
}
|
|
|
|
|
|
/* transmit interrupt (TX buffer is free) */
|
|
else{
|
|
/* Clear interrupt flag */
|
|
CAN_REG(CANmodule->CANbaseAddress, C_INTF) &= 0xFFFE;
|
|
/* First CAN message (bootup) was sent successfully */
|
|
CANmodule->firstCANtxMessage = false;
|
|
/* clear flag from previous message */
|
|
CANmodule->bufferInhibitFlag = false;
|
|
/* Are there any new messages waiting to be send */
|
|
if(CANmodule->CANtxCount > 0U){
|
|
uint16_t i; /* index of transmitting message */
|
|
|
|
/* first buffer */
|
|
CO_CANtx_t *buffer = &CANmodule->txArray[0];
|
|
/* search through whole array of pointers to transmit message buffers. */
|
|
for(i = CANmodule->txSize; i > 0U; i--){
|
|
/* if message buffer is full, send it. */
|
|
if(buffer->bufferFull){
|
|
buffer->bufferFull = false;
|
|
CANmodule->CANtxCount--;
|
|
|
|
/* Copy message to CAN buffer */
|
|
CANmodule->bufferInhibitFlag = buffer->syncFlag;
|
|
CO_CANsendToModule(CANmodule->CANbaseAddress, CANmodule->CANmsgBuff, buffer);
|
|
break; /* exit for loop */
|
|
}
|
|
buffer++;
|
|
}/* end of for loop */
|
|
|
|
/* Clear counter if no more messages */
|
|
if(i == 0U){
|
|
CANmodule->CANtxCount = 0U;
|
|
}
|
|
}
|
|
}
|
|
}
|