443 lines
17 KiB
C
443 lines
17 KiB
C
/*
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* CAN module object for Microchip dsPIC33 or PIC24 microcontroller.
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*
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* @file CO_driver.h
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* @author Janez Paternoster
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* @author Péter Rózsahegyi
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* @copyright 2004 - 2013 Janez Paternoster
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*
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* This file is part of CANopenNode, an opensource CANopen Stack.
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* Project home page is <http://canopennode.sourceforge.net>.
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* For more information on CANopen see <http://www.can-cia.org/>.
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*
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* CANopenNode is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 2.1 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef CO_DRIVER_H
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#define CO_DRIVER_H
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/* For documentation see file drvTemplate/CO_driver.h */
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#if defined(__dsPIC33F__) || defined(__PIC24H__)
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#include <p33fxxxx.h> /* processor header file */
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#elif defined(__dsPIC33E__) || defined(__PIC24E__)
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#include <p33exxxx.h> /* processor header file */
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#endif
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#include <stddef.h> /* for 'NULL' */
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#include <stdint.h> /* for 'int8_t' to 'uint64_t' */
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#ifdef __HAS_EDS__
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#define EDS_PTR __eds__
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#else
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#define EDS_PTR
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#endif
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/* CAN module base address */
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#define ADDR_CAN1 ((uint16_t)&C1CTRL1)
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#define ADDR_CAN2 ((uint16_t)&C2CTRL1)
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#define ADDR_DMA0 ((uint16_t)&DMA0CON)
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#define ADDR_DMA1 ((uint16_t)&DMA1CON)
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#define ADDR_DMA2 ((uint16_t)&DMA2CON)
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#define ADDR_DMA3 ((uint16_t)&DMA3CON)
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#define ADDR_DMA4 ((uint16_t)&DMA4CON)
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#define ADDR_DMA5 ((uint16_t)&DMA5CON)
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#define ADDR_DMA6 ((uint16_t)&DMA6CON)
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#define ADDR_DMA7 ((uint16_t)&DMA7CON)
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/* Critical sections */
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#define CO_LOCK_CAN_SEND() asm volatile ("disi #0x3FFF")
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#define CO_UNLOCK_CAN_SEND() asm volatile ("disi #0x0000")
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#define CO_LOCK_EMCY() asm volatile ("disi #0x3FFF")
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#define CO_UNLOCK_EMCY() asm volatile ("disi #0x0000")
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#define CO_LOCK_OD() asm volatile ("disi #0x3FFF")
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#define CO_UNLOCK_OD() asm volatile ("disi #0x0000")
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/* Data types */
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/* int8_t to uint64_t are defined in stdint.h */
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typedef unsigned char bool_t;
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typedef float float32_t;
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typedef long double float64_t;
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typedef char char_t;
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typedef unsigned char oChar_t;
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typedef unsigned char domain_t;
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/* CAN bit rates
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*
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* CAN bit rates are initializers for array of eight CO_CANbitRateData_t
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* objects.
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*
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* Macros are not used by driver itself, they may be used by application with
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* combination with object CO_CANbitRateData_t.
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* Application must declare following global variable depending on CO_FCY used:
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* const CO_CANbitRateData_t CO_CANbitRateData[8] = {CO_CANbitRateDataInitializers};
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*
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* There are initializers for eight objects, which corresponds to following
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* CAN bit rates (in kbps): 10, 20, 50, 125, 250, 500, 800, 1000.
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*
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* CO_FCY is internal instruction cycle clock frequency in kHz units. See
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* dsPIC33F documentation for more information on FCY.
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*
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* Possible values for FCY are (in three groups):
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* - Optimal CAN bit timing on all Baud Rates: 8000, 12000, 16000, 24000.
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* - Not so optimal CAN bit timing on all Baud Rates: 4000, 32000.
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* - not all CANopen Baud Rates possible: 2000, 3000, 5000, 6000, 10000,
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* 20000, 40000.
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*
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* IMPORTANT: For FCY<=12000 there is unresolved bug; CANCKS configuration
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* bit on ECAN does not work, so some baudrates are not possible.
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*/
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#ifdef CO_FCY
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/* Macros, which divides K into (SJW + PROP + PhSeg1 + PhSeg2) */
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#define TQ_x_4 1, 1, 1, 1
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#define TQ_x_5 1, 1, 2, 1
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#define TQ_x_6 1, 1, 3, 1
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#define TQ_x_8 1, 2, 3, 2
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#define TQ_x_9 1, 2, 4, 2
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#define TQ_x_10 1, 3, 4, 2
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#define TQ_x_12 1, 3, 6, 2
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#define TQ_x_14 1, 4, 7, 2
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#define TQ_x_15 1, 4, 8, 2 /* good timing */
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#define TQ_x_16 1, 5, 8, 2 /* good timing */
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#define TQ_x_17 1, 6, 8, 2 /* good timing */
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#define TQ_x_18 1, 7, 8, 2 /* good timing */
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#define TQ_x_19 1, 8, 8, 2 /* good timing */
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#define TQ_x_20 1, 8, 8, 3 /* good timing */
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#define TQ_x_21 1, 8, 8, 4
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#define TQ_x_25 1, 8, 8, 8
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#if CO_FCY == 2000
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#define CO_CANbitRateDataInitializers \
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{1, 5, TQ_x_20}, /*CAN=10kbps*/ \
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{2, 5, TQ_x_20}, /*CAN=20kbps*/ \
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{1, 1, TQ_x_20}, /*CAN=50kbps*/ \
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{2, 1, TQ_x_16}, /*CAN=125kbps*/ \
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{2, 1, TQ_x_8 }, /*CAN=250kbps*/ \
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{2, 1, TQ_x_4 }, /*CAN=500kbps*/ \
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{2, 1, TQ_x_4 }, /*Not possible*/ \
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{2, 1, TQ_x_4 } /*Not possible*/
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#elif CO_FCY == 3000
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#define CO_CANbitRateDataInitializers \
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{2, 15, TQ_x_20}, /*CAN=10kbps*/ \
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{1, 5, TQ_x_15}, /*CAN=20kbps*/ \
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{1, 2, TQ_x_15}, /*CAN=50kbps*/ \
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{1, 1, TQ_x_12}, /*CAN=125kbps*/ \
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{2, 1, TQ_x_12}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_6 }, /*CAN=500kbps*/ \
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{2, 1, TQ_x_6 }, /*Not possible*/ \
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{2, 1, TQ_x_6 } /*Not possible*/
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#elif CO_FCY == 4000
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#define CO_CANbitRateDataInitializers \
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{2, 25, TQ_x_16}, /*CAN=10kbps*/ \
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{1, 5, TQ_x_20}, /*CAN=20kbps*/ \
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{2, 5, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 1, TQ_x_16}, /*CAN=125kbps*/ \
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{2, 1, TQ_x_16}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_8 }, /*CAN=500kbps*/ \
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{2, 1, TQ_x_5 }, /*CAN=800kbps*/ \
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{2, 1, TQ_x_4 } /*CAN=1000kbps*/
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#elif CO_FCY == 5000
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#define CO_CANbitRateDataInitializers \
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{2, 25, TQ_x_20}, /*CAN=10kbps*/ \
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{1, 5, TQ_x_25}, /*CAN=20kbps*/ \
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{2, 5, TQ_x_20}, /*CAN=50kbps*/ \
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{1, 1, TQ_x_20}, /*CAN=125kbps*/ \
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{2, 1, TQ_x_20}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_10}, /*CAN=500kbps*/ \
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{2, 1, TQ_x_10}, /*Not possible*/ \
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{2, 1, TQ_x_5 } /*CAN=1000kbps*/
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#elif CO_FCY == 6000
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#define CO_CANbitRateDataInitializers \
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{1, 20, TQ_x_15}, /*CAN=10kbps*/ \
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{1, 10, TQ_x_15}, /*CAN=20kbps*/ \
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{1, 4, TQ_x_15}, /*CAN=50kbps*/ \
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{2, 3, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 1, TQ_x_12}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_12}, /*CAN=500kbps*/ \
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{2, 1, TQ_x_12}, /*Not possible*/ \
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{2, 1, TQ_x_6 } /*CAN=1000kbps*/
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#elif CO_FCY == 8000
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#define CO_CANbitRateDataInitializers \
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{1, 25, TQ_x_16}, /*CAN=10kbps*/ \
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{2, 25, TQ_x_16}, /*CAN=20kbps*/ \
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{1, 5, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 2, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 1, TQ_x_16}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_16}, /*CAN=500kbps*/ \
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{2, 1, TQ_x_10}, /*CAN=800kbps*/ \
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{2, 1, TQ_x_8 } /*CAN=1000kbps*/
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#elif CO_FCY == 10000
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#define CO_CANbitRateDataInitializers \
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{1, 25, TQ_x_20}, /*CAN=10kbps*/ \
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{2, 25, TQ_x_20}, /*CAN=20kbps*/ \
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{1, 5, TQ_x_20}, /*CAN=50kbps*/ \
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{2, 5, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 1, TQ_x_20}, /*CAN=250kbps*/ \
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{2, 1, TQ_x_20}, /*CAN=500kbps*/ \
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{2, 1, TQ_x_20}, /*Not possible*/ \
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{2, 1, TQ_x_10} /*CAN=1000kbps*/
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#elif CO_FCY == 12000
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#define CO_CANbitRateDataInitializers \
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{2, 63, TQ_x_19}, /*CAN=10kbps*/ \
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{1, 20, TQ_x_15}, /*CAN=20kbps*/ \
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{2, 15, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 3, TQ_x_16}, /*CAN=125kbps*/ \
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{2, 3, TQ_x_16}, /*CAN=250kbps*/ \
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{1, 1, TQ_x_12}, /*CAN=500kbps*/ \
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{2, 1, TQ_x_15}, /*CAN=800kbps*/ \
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{2, 1, TQ_x_12} /*CAN=1000kbps*/
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#elif CO_FCY == 16000
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#define CO_CANbitRateDataInitializers \
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{1, 50, TQ_x_16}, /*CAN=10kbps*/ \
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{1, 25, TQ_x_16}, /*CAN=20kbps*/ \
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{1, 10, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 4, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 2, TQ_x_16}, /*CAN=250kbps*/ \
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{1, 1, TQ_x_16}, /*CAN=500kbps*/ \
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{1, 1, TQ_x_10}, /*CAN=800kbps*/ \
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{1, 1, TQ_x_8 } /*CAN=1000kbps*/
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#elif CO_FCY == 20000
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#define CO_CANbitRateDataInitializers \
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{1, 50, TQ_x_20}, /*CAN=10kbps*/ \
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{1, 25, TQ_x_20}, /*CAN=20kbps*/ \
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{1, 10, TQ_x_20}, /*CAN=50kbps*/ \
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{1, 5, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 2, TQ_x_20}, /*CAN=250kbps*/ \
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{1, 1, TQ_x_20}, /*CAN=500kbps*/ \
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{1, 1, TQ_x_20}, /*Not possible*/ \
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{1, 1, TQ_x_10} /*CAN=1000kbps*/
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#elif CO_FCY == 24000
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#define CO_CANbitRateDataInitializers \
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{1, 63, TQ_x_19}, /*CAN=10kbps*/ \
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{1, 40, TQ_x_15}, /*CAN=20kbps*/ \
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{1, 15, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 6, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 3, TQ_x_16}, /*CAN=250kbps*/ \
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{1, 2, TQ_x_12}, /*CAN=500kbps*/ \
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{1, 1, TQ_x_15}, /*CAN=800kbps*/ \
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{1, 1, TQ_x_12} /*CAN=1000kbps*/
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#elif CO_FCY == 32000
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#define CO_CANbitRateDataInitializers \
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{1, 64, TQ_x_25}, /*CAN=10kbps*/ \
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{1, 50, TQ_x_16}, /*CAN=20kbps*/ \
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{1, 20, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 8, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 4, TQ_x_16}, /*CAN=250kbps*/ \
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{1, 2, TQ_x_16}, /*CAN=500kbps*/ \
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{1, 2, TQ_x_10}, /*CAN=800kbps*/ \
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{1, 1, TQ_x_16} /*CAN=1000kbps*/
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#elif CO_FCY == 40000
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#define CO_CANbitRateDataInitializers \
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{1, 50, TQ_x_20}, /*Not possible*/ \
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{1, 50, TQ_x_20}, /*CAN=20kbps*/ \
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{1, 25, TQ_x_16}, /*CAN=50kbps*/ \
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{1, 10, TQ_x_16}, /*CAN=125kbps*/ \
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{1, 5, TQ_x_16}, /*CAN=250kbps*/ \
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{1, 2, TQ_x_20}, /*CAN=500kbps*/ \
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{1, 1, TQ_x_25}, /*CAN=800kbps*/ \
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{1, 1, TQ_x_20} /*CAN=1000kbps*/
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#else
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#error define_CO_FCY CO_FCY not supported
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#endif
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#endif
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/* Structure contains timing coefficients for CAN module.
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*
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* CAN baud rate is calculated from following equations:
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* FCAN = FCY * Scale - Input frequency to CAN module (MAX 40MHz for dsPIC33F and PIC24H)
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* TQ = 2 * BRP / FCAN - Time Quanta
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* BaudRate = 1 / (TQ * K) - Can bus Baud Rate
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* K = SJW + PROP + PhSeg1 + PhSeg2 - Number of Time Quantas
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*/
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typedef struct{
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uint8_t scale; /* (1 or 2) Scales FCY clock - dsPIC33F and PIC24H specific */
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uint8_t BRP; /* (1...64) Baud Rate Prescaler */
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uint8_t SJW; /* (1...4) SJW time */
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uint8_t PROP; /* (1...8) PROP time */
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uint8_t phSeg1; /* (1...8) Phase Segment 1 time */
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uint8_t phSeg2; /* (1...8) Phase Segment 2 time */
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}CO_CANbitRateData_t;
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/* Return values */
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typedef enum{
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CO_ERROR_NO = 0,
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CO_ERROR_ILLEGAL_ARGUMENT = -1,
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CO_ERROR_OUT_OF_MEMORY = -2,
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CO_ERROR_TIMEOUT = -3,
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CO_ERROR_ILLEGAL_BAUDRATE = -4,
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CO_ERROR_RX_OVERFLOW = -5,
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CO_ERROR_RX_PDO_OVERFLOW = -6,
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CO_ERROR_RX_MSG_LENGTH = -7,
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CO_ERROR_RX_PDO_LENGTH = -8,
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CO_ERROR_TX_OVERFLOW = -9,
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CO_ERROR_TX_PDO_WINDOW = -10,
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CO_ERROR_TX_UNCONFIGURED = -11,
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CO_ERROR_PARAMETERS = -12,
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CO_ERROR_DATA_CORRUPT = -13,
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CO_ERROR_CRC = -14
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}CO_ReturnError_t;
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/* CAN receive message structure as aligned in CAN module.
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* In dsPIC33F and PIC24H this structure is used for both: transmitting and
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* receiving to and from CAN module. (Object is ownded by CAN module).
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*/
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typedef struct{
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uint16_t ident; /* Standard Identifier as aligned in CAN module. 16 bits:
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'UUUSSSSS SSSSSSRE' (U: unused; S: SID; R=SRR; E=IDE). */
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uint16_t extIdent; /* Extended identifier, not used here */
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uint16_t DLC :4; /* Data length code (bits 0...3) */
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uint16_t DLCrest :12; /* Not used here (bits 4..15) */
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uint8_t data[8]; /* 8 data bytes */
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uint8_t dummy; /* Not used */
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uint8_t FILHIT; /* Filter hit */
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}CO_CANrxMsg_t;
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/* Received message object */
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typedef struct{
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uint16_t ident;
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uint16_t mask;
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void *object;
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void (*pFunct)(void *object, const CO_CANrxMsg_t *message);
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}CO_CANrx_t;
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/* Transmit message object. */
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typedef struct{
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uint16_t ident; /* Standard Identifier as aligned in CAN module. 16 bits:
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'SSSSSUUU SSSSSSRE' (U: unused; S: SID; R=SRR; E=IDE). */
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uint8_t DLC;
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uint8_t data[8];
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volatile bool_t bufferFull;
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volatile bool_t syncFlag;
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}CO_CANtx_t;
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/* CAN module object. */
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typedef struct{
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uint16_t CANbaseAddress;
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EDS_PTR CO_CANrxMsg_t *CANmsgBuff; /* dsPIC33F specific: CAN message buffer for CAN module */
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uint8_t CANmsgBuffSize; /* dsPIC33F specific: Size of the above buffer */
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CO_CANrx_t *rxArray;
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uint16_t rxSize;
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CO_CANtx_t *txArray;
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uint16_t txSize;
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volatile bool_t useCANrxFilters;
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volatile bool_t bufferInhibitFlag;
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volatile bool_t firstCANtxMessage;
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volatile uint16_t CANtxCount;
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uint32_t errOld;
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void *em;
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}CO_CANmodule_t;
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/* Endianes */
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#define CO_LITTLE_ENDIAN
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/* Request CAN configuration or normal mode */
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void CO_CANsetConfigurationMode(uint16_t CANbaseAddress);
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void CO_CANsetNormalMode(uint16_t CANbaseAddress);
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/* Initialize CAN module object.
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*
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* @param DMArxBaseAddress dsPIC33F specific: Base address for registers for
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* DMA reception. See Peripheral addresses.
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* @param DMAtxBaseAddress dsPIC33F specific: Base address for registers for
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* DMA transmission. See Peripheral addresses.
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* @param CANmsgBuff dsPIC33F specific: Pointer to CAN message buffer defined in DMA RAM.
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* @param CANmsgBuffSize dsPIC33F specific: Size of above buffer.
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* @param CANmsgBuffDMAoffset dsPIC33F specific: DMA offset of the above buffer.
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*/
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CO_ReturnError_t CO_CANmodule_init(
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CO_CANmodule_t *CANmodule,
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uint16_t CANbaseAddress,
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uint16_t DMArxBaseAddress,
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uint16_t DMAtxBaseAddress,
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EDS_PTR CO_CANrxMsg_t *CANmsgBuff,
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uint8_t CANmsgBuffSize,
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uint16_t CANmsgBuffDMAoffset,
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#ifdef __HAS_EDS__
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uint16_t CANmsgBuffDMApage,
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#endif
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CO_CANrx_t rxArray[],
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uint16_t rxSize,
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CO_CANtx_t txArray[],
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uint16_t txSize,
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uint16_t CANbitRate);
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/* Switch off CANmodule. */
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void CO_CANmodule_disable(CO_CANmodule_t *CANmodule);
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/* Read CAN identifier */
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uint16_t CO_CANrxMsg_readIdent(const CO_CANrxMsg_t *rxMsg);
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/* Configure CAN message receive buffer. */
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CO_ReturnError_t CO_CANrxBufferInit(
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CO_CANmodule_t *CANmodule,
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uint16_t index,
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uint16_t ident,
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uint16_t mask,
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bool_t rtr,
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void *object,
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void (*pFunct)(void *object, const CO_CANrxMsg_t *message));
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/* Configure CAN message transmit buffer. */
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CO_CANtx_t *CO_CANtxBufferInit(
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CO_CANmodule_t *CANmodule,
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uint16_t index,
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uint16_t ident,
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bool_t rtr,
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uint8_t noOfBytes,
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bool_t syncFlag);
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/* Send CAN message. */
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CO_ReturnError_t CO_CANsend(CO_CANmodule_t *CANmodule, CO_CANtx_t *buffer);
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/* Clear all synchronous TPDOs from CAN module transmit buffers. */
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void CO_CANclearPendingSyncPDOs(CO_CANmodule_t *CANmodule);
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/* Verify all errors of CAN module. */
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void CO_CANverifyErrors(CO_CANmodule_t *CANmodule);
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/* CAN interrupt receives and transmits CAN messages.
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*
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* Function must be called directly from _C1Interrupt or _C2Interrupt with
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* high priority.
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*/
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void CO_CANinterrupt(CO_CANmodule_t *CANmodule);
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#endif
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